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MLK-L1-CZ06-DR1M90G-HDMI

DR1 VDMA

MLK-L1-CZ06-DR1M90G-HDMI-1080p-VDMA-Stream

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TD Version - 2024.10

FD Version - 2024.10

This project demonstrates a video stream example, which uses DDR as a storage medium and stream the Dcache data as video output to the HDMI via ARM standalone VDMA control.

Demo Image

Screen Board
image image

Make Sure

Remember that the board uses PLIO UART

The SDK C program is require to reuse the default Anlogic VDMA example inside FD IDE.